TCP/IP Chips + MCUs
Wiznet TCP-IP Hardwired Chips integrate to Layers 1 (PHY) and 2 (MAC) also Layers 3 and 4 (TCP/IP) of the Ethernet protocol on gate level. They support TCP, IPv4, UDP, ICMP, ARP, PPPoE and Multicast.
Wiznet Hardwired TCP/IP Chips are available in three Integration Stages:
- 2 in 1: TCP/IP + MAC
- 3 in 1: TCP/IP + MAC + PHY
- 4 in 1: Controller + TCP/IP + MAC + PHY
TCP/IP Hardwired-Chips
W6100
W6100 is a hardwired Internet controller chip supporting IPv4/IPv6 dual stack by adding IPv6 functions on the basis of WIZnet’s patented hardwired TCP/IP core technology. W6100 supports TCP/IP protocols such as TCP, UDP, IPv6, IPv4, ICMPv6, ICMPv4, IGMP, ARP and PPPoE.
W5500
The W5500 chip is a Hardwired Internet controller with an integrated full TCP/IP stack, enabling Internet connectivity via SPI with up to 80MHz speed. It combines 10/100 Ethernet MAC and PHY for stable connectivity and supports protocols like TCP, UDP, IPv4, among others.
W5300
W5300 is a 0.18 μm CMOS technology single chip into which 10/100 Ethernet controller, MAC, and TCP/IP are integrated. W5300 is designed for Internet embedded applications where easy implementation, stability, high performance, and effective cost are required.
W5200
The W5200 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using SPI (Serial Peripheral Interface). W5200 suits best for users who need Internet connectivity for application that uses a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY.
W5100S
W5100S designed with Hardwired TCP/IP, WIZnet Technology, is an embedded Internet Controller Chip. W5100S supporting Full Hardwired, Ethernet MAC (Media Access Control), and 10Base-T/100Base-TX Ethernet PHY is Internet Connectivity One-chip Solution for Internet Protocol (TCP/IP).
W5100
The W5100 is a full-featured, single-chip Internet-enabled 10/100 Ethernet controller designed for embedded applications where ease of integration, stability, performance, area and system cost control are required.
W3150A+
The W3150A+ is an LSI of hardware protocol stack that provides an easy, low-cost solution for high-speed Internet connectivity for digital devices by allowing simple installation of TCP/IP stack in the hardware.
TCP/IP Hardwired-MCUs
W7500P
The IOP4IoT W7500P chip is the one-chip solution which integrates an ARM Cortex-M0, 128KB Flash, hardwired TCP/IP core for various embedded application platform, 10/100 Ethernet MAC and PHY, and especially internet of things.
W7500
The IOP4IoT W7500 chip is the one-chip solution which integrates an ARM Cortex-M0, 128KB Flash and hardwired TCP/IP core for various embedded application platforms. The TCP/IP core is a market-proven hardwired TCP/IP stack with an integrated Ethernet MAC.
Additional features:
- Software compatible with W5100
- Maximum 4 independent hardware sockets
- 8Kb TX and 8Kb RX buffers
- Power Down and WOL
- 10 / 100BaseTX MDI-X PHY
- Temperature range: -40 ° C - 85 ° C
The W5100S is available in a 48 pin LQFP & QFN package. Volume price at 10k is 1.00 EUR.
The new W6100 supports with it´s dual stack IPv4 and IPv6 and is pin compatible to W5100S.
Wiznet's new W5100S is a TCP / IP hardwired Ethernet controller that provides cost-effective Ethernet connectivity through SPI and 8-bit interfaces. With the integration of TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE as well as MAC / PHY, you do not need a software stack and can connect sensors and IoT devices to networks with a simple SOCKET program with minimal software effort.
